About Huawei
Huawei is a global leader in information and communications technology (ICT), renowned for its pioneering work in AI hardware, large-scale computing infrastructure, and integrated software-hardware solutions. With a workforce of over 194,000 employees across more than 170 countries, Huawei operates the world’s largest R&D organization, including advanced research centers dedicated to next-generation AI and processor technologies.
At Huawei, innovation isn’t just a buzzword—it’s built into the DNA of the company. Its full-stack AI ecosystem spans from foundational hardware like the Ascend AI accelerator series and wafer-scale clusters, to advanced software frameworks and scalable AI models that power everything from edge devices to supercomputing data centers.
About the lab
This specific role is based at Huawei’s Zurich Research Center, launched just 6 years ago and already home to more than 160 experts. You would be joining the AI Innovation Group within the Computing Systems Lab, a dynamic team of 20+ researchers focused on advancing AI solutions across hardware, systems, software, and algorithms.
Join us at the forefront of AI hardware innovation. We are seeking a visionary researcher to drive hardware architecture research for next-generation AI accelerators, with a focus on design-space exploration for breakthrough concepts such as wafer-scale integration, near-data processing, and 3D-stacked memory.
You will be expected to bridge the gap between hardware and algorithmic advancements, considering the latest trends in AI model architectures—from prefill/decode disaggregation and speculative decoding to quantization techniques and sparsity. Your research will directly address the needs of emerging and future workloads, including Mixture-of-Experts (MoE) transformers, diffusion models, latent attention mechanisms, and other cutting-edge approaches yet to be defined.
This is a unique opportunity to shape the future of AI hardware by exploring uncharted territories, collaborating with world-class experts, and delivering architectural insights that will define the next era of intelligent computing.
Your Responsibilities:
Research and design-space exploration of novel AI accelerator architectures, with a focus on breakthrough concepts such as wafer-scale integration, near-data processing, and 3D-stacked memory.
- Drive the joint optimization of hardware, software, and algorithms, ensuring seamless co-design to maximize performance, efficiency, and scalability for current and emerging AI workloads.
- Analyze and integrate state-of-the-art algorithmic advancements—including prefill/decode disaggregation, speculative decoding, and quantization—into architectural proposals.
- Prototype, simulate, and evaluate new architectural ideas, collaborating closely with cross-functional teams to align innovations with real-world deployment needs.
- Communicate research findings and recommendations through technical reports, presentations, and contributions to intellectual property.
Your Background
- You hold a PhD in computer science or a closely related field.
- Proven track record in hardware architecture research, particularly in the context of AI accelerators, high-performance computing, or advanced memory systems (e.g., wafer-scale, near-data processing, 3D-stacked memory).
- Deep understanding of the interplay between hardware, software, and algorithms, with hands-on experience in co-optimizing these layers for real-world AI workloads.
- Strong familiarity with state-of-the-art AI models and algorithmic trends, including transformer architectures, diffusion models, quantization, and workload-specific optimizations.
- Demonstrated ability to lead complex research projects, from ideation and design-space exploration to prototyping, simulation, and performance analysis. You are capable of pragmatically move forward with uncertain information on future workloads and technological capabilities.
- Excellent collaboration skills, with experience working in multidisciplinary teams and communicating effectively with both technical and non-technical stakeholders.
- Strong publication record in top-tier conferences or journals, and/or a history of impactful patents or technology transfers.
- Passion for innovation, curiosity for emerging technologies, and a drive to shape the future of AI hardware.
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